The center offers educational experiences for students of all ages, as well as teachers and external partners, which will help the U.S. meet the demand for the technology that infuses our daily lives.
The research proposed by a team featuring Professor Biing-Hwang Juang introduces DeepSC, a deep learning-based semantic communication system designed for text transmission.
In June, some of the world’s top technologists in the VLSI industry will convene in Honolulu for one of the premier symposiums for microelectronics and semiconductor research.
As the global demand for microelectronics continues to surge, CAEML's mission to apply machine learning to the design of optimized microelectronic circuits and systems has become even more crucial.
The paper presents a physical design tool named Compact-2D that automatically builds high-density and commercial-quality monolithic three-dimensional integrated circuits (3D ICs).
Harnessing the power of “phase-change” materials, Georgia Tech researchers have demonstrated how reconfigurable metasurfaces — artificial materials with extraordinary optical properties — are crucial to the future of nanotechnology.
Six Georgia Tech faculty members were named IEEE Fellows, effective January 1, 2022. They are Ghassan AlRegib, Levent Degertekin, Bonnie Ferri, Arijit Raychowdhury, Maryam Saeedifard, and May Dongmei Wang.
EPEPS is the premier international conference on advanced and emerging issues in electrical modeling, analysis and design of electronic interconnections, packages, and systems.
The School’s partnership with the Semiconductor Research Corporation (SRC), in particular, will be key to the country’s long-term semiconductor competitiveness.
The award-winning article proposes a novel hierarchical physical design flow enabling the building of high-density and commercial-quality two-tier face-to-face-bonded hierarchical 3D ICs.
The K99/R00 Pathway award provides support for up to two-year postdoctoral mentored phase and a successive three-year independent phase as a principal investigator.
The collaboration hopes to redefine digital storage, tackling the core of AI progress by reducing voltage in NAND flash technology through a new ferroelectric structure.
Professor Emeritus Madhavan Swaminathan’s contributions to semiconductor packaging have been recognized with an IEEE Technical Field Award named in honor of Professor Emeritus Rao R. Tummala.
The flagship computer-aided design journal (IEEE TCAD) has honored a NeuroSim series developed by Xiaochen Peng and Shimeng Yu, continuing ECE research's winning streak.
