Paragkumar Thadesar has been named the recipient of the Outstanding Poster Paper Award from the IEEE 63rd Electronic Components and Technology Conference (ECTC), held last May in Las Vegas. A Ph.D. student in the Georgia Tech School of Electrical and Computer Engineering (ECE), Thadesar and ECE Associate Professor Muhannad Bakir will be presented with this honor at the IEEE 64^th ECTC to be held in Orlando May 27-30; Bakir was a coauthor on the paper and serves as Thadesar's Ph.D. advisor.

The title of the award-winning paper is “Fabrication and Characterization of Novel Photodefined Polymer-Enhanced Through-Silicon Vias for Silicon Interposers.” Silicon interposers with high-density metallization help support multiple silicon chips atop with high bandwidth-density communication between the chips, and consequently, they help obtain compact integrated circuit (IC) systems. As a result, silicon interposers have been widely explored by both the semiconductor industry and academia for a wide range of applications from mobile phones to high-performance computing in supercomputers and data centers. State-of-the-art vertical metal interconnections, also known as through-silicon vias (TSVs), help connect chips atop a silicon interposer to an organic substrate below the interposer. However, these state-of-the-art TSVs exhibit a large electrical loss, which becomes a concern at higher frequencies.

To address this challenge, Paragkumar and Bakir designed, fabricated, and characterized photodefined polymer-embedded vias with copper vias within polymer wells in silicon. It is a unique vertical metal interconnection technology with the fabrication ease of silicon interposers and the electrical advantages of competing glass interposers. The polymer-embedded vias promise approximately 80 percent reduction in TSV insertion loss at 50 GHz compared to the state-of-the-art TSVs with similar dimensions.