The ECE professor, who specializes in semiconductor memory devices and circuits, was selected for his exceptional record of scholarship and service to the Institute.

The use of AI in EDA is a hot topic due to significant progress with applying machine learning to the issues of chip design.

Georgia Tech’s Center for Co-design of Chip, Package System (C3PS) led by Profs. A. Raychowdhury and M. Swaminathan headed-up Georgia Tech’s winning proposal that resulted in a 5 year, $3.5M award that will fund up to 10 GRA positions.

The Georgia Institute of Technology, School of Electrical and Computer Engineering Professor, Dr. Rao Tummala, will present a keynote lecture at the 2016 International Wafer-Level Packaging Conference (IWLPC), on October 19 in San Jose, CA.