The ECE professor, who specializes in semiconductor memory devices and circuits, was selected for his exceptional record of scholarship and service to the Institute.

Georgia Tech School of Electrical and Computer Engineering Professor Shimeng Yu was appointed to the Dean’s Professorship, effective on August 1, 2024.

He was selected to the five-year appointment for his exceptional record of scholarship and service to the Institute.

Yu joined ECE in 2018, bringing his expertise in semiconductor devices and integrated circuits for AI hardware. He currently runs the Laboratory for Emerging Devices and Circuits.

The primary challenge in current AI acceleration is the extensive data movement cost between the compute and memory components. His research aims to close that gap to greatly improve the compute throughput and energy efficiency through innovations in a variety of memory technologies and 3D integration.

His research has received support from federal agencies like the National Science Foundation, the Defense Advanced Research Projects Agency (DARPA), Intelligence Advanced Research Projects Activity, and the Department of Education, as well as from industry sponsors such as the Semiconductor Research Corporation (SRC), Intel, the Taiwan Semiconductor Manufacturing Company, Samsung, SK Hynix, Qualcomm, Sony, IMEC, and Google.

He's received recognition and awards from some of the top organizations in his field. He was named an IEEE Fellow for his contributions to non-volatile memories and in-memory computing, and won Intel's Outstanding Researcher Award for a prototype small-scale accelerator chip that is able to quantify uncertainty in modern computer hardware, allowing for improved computing robustness.

Yu holds many other responsibilities outside of his ECE appointments for building ecosystem in the research community.

He leads the open-source NeuroSim platform that provides a benchmark tool for AI hardware that encompasses a wide range of technology flavors and supports machine learning algorithms from convolutional neural networks to transformers.

He is also the theme lead of two SRC/DARPA Joint University Microelectronics Program (JUMP) 2.0 centers on intelligent memory/storage and heterogeneous/monolithic 3D integration, as well as serving as the technical program committee for two flagship conferences in the field of semiconductors: IEEE International Electron Devices Meeting and IEEE Symposium on VLSI Technology and Circuits.

Yu also has a series of YouTube lectures that aim to train the next generation of engineers with domain expertise in memory technologies.

He received the B.S. degree in microelectronics from Peking University in 2009, and the M.S. degree and Ph.D. degree in electrical engineering from Stanford University in 2011 and 2013, respectively.

Before coming to ECE he was an assistant professor at Arizona State University from 2013 to 2018.