The use of AI in EDA is a hot topic due to significant progress with applying machine learning to the issues of chip design.

Georgia Tech and NextFlex – Flexible Hybrid Electronics Manufacturing Innovation Institute hosted a workshop to explore energy harvesting, energy storage, and power deliver & management approaches for Internet of Things.

The Georgia Tech Electronics and Micro-System Lab (GEMS), Professor Hua Wang, unveiled a trio of high performance integrated circuit designs that hold the potential to increase the efficiency and portability of future 5G wireless and IoT based devices.

Georgia Tech’s Center for Co-design of Chip, Package System (C3PS) led by Profs. A. Raychowdhury and M. Swaminathan headed-up Georgia Tech’s winning proposal that resulted in a 5 year, $3.5M award that will fund up to 10 GRA positions.

In their recent work published as an Editor’s Pick in the May issue of Applied Physics Letters, they show how these mystery materials—antiferroelectrics—can be fine-tuned by doping...

“This paper presents the first reported integrated circuit which implements reinforcement learning at less than a milli-Watt. This can enable a wide variety of applications in autonomous and bio-mimetic systems.”

On October the 24th, sophomore level students from the Gwinnett School of Mathematics, Science, and Technology (GSMST) got the rare chance to “gown up” and enter the research cleanrooms at the Marcus Nanotechnology Building.

New methods of communication, which can reach anyone in the world, effectively for free, spurred Dr. Michael Filler to launch the Nanovation podcast.

The Georgia Institute of Technology, School of Electrical and Computer Engineering Professor, Dr. Rao Tummala, will present a keynote lecture at the 2016 International Wafer-Level Packaging Conference (IWLPC), on October 19 in San Jose, CA.

The Center for Advanced Electronics through Machine Learning (CAEML) seeks to accelerate advances by leveraging machine-learning techniques to develop new models for electronic design automation (EDA) tools create and verify chip designs for market.

This seed grant program was developed to expedite the initiation of new graduate students and research projects into productive activity. Successful proposals will identify a new, currently-unfunded research idea that requires cleanroom access.

On August 24, 2020, NSF announced that it will invest a further $84 million over five years in a renewal of the NNCI Program. In March 2021, the NSF has again selected Georgia Tech to lead the Coordinating Office with participation from Arizona State...

With the ever-increasing demand for autonomous robotics to operate in the most visually ambiguous environments with the least amount of resources necessary, a team at Georgia Tech has developed the NeuroSLAM accelerator IC for edge robotics.