Research Paper Featuring Researchers from the School of Computer Science and School of Electrical and Computer Engineering Wins Coveted Best Paper Award.
Walter Henderson, Research Engineer and Bio-Characterization Team Lead for the IEN, interview introduction to the unique aspects, and current and future capabilities of the Marcus Nanotechnology Microscopy Suite.
On October 28, 2014 in the Marcus Nanotechnology Building Conference Room Suite at noon, Dr. James Meindl will present the first group of STEM Outreach Ambassadors from the “Teachable Moments” Program with certificates of outreach training completion
Imagine you’re a college student cramming for a test in your dorm room. What if there was a way for the school supplies and food to be delivered right to your dorm – not by car or foot, but by drone?
Paul Voss appointed to serve as Academic Director at Georgia Tech-Lorraine with oversight of all aspects of academic operations at Tech's European campus in Metz, France.
The Marconi Society Paul Baran Young Scholar Award honors the world’s most innovative young engineers in information and communications technology (ICT).
ECE Ph.D. student Mohammad Sendi received the J. Norman and Rosalyn Wells Fellowship Award, which is presented by the Wallace H. Coulter Department of Biomedical Engineering at Georgia Tech and Emory University.
The School of Electrical and Computer Engineering (ECE) is pleased to announce the appointment of our newest faculty member, Cong (Callie) Hao, and her appointment to the Sutterfield Family Early Career Professorship.
Each year, ten outstanding IPS student members from around the world are awarded the Graduate Student Scholarship. Md Shariful Islam, a Ph.D. candidate in the Georgia Tech School of Electrical and Computer Engineering (ECE), has been selected for the 2022
The pandemic has taken — and will continue to take— a heavy toll. Getting students oriented and helping them succeed will require innovative new approaches to student support.
The award-winning article proposes a novel hierarchical physical design flow enabling the building of high-density and commercial-quality two-tier face-to-face-bonded hierarchical 3D ICs.
The K99/R00 Pathway award provides support for up to two-year postdoctoral mentored phase and a successive three-year independent phase as a principal investigator.
The paper presents a physical design tool named Compact-2D that automatically builds high-density and commercial-quality monolithic three-dimensional integrated circuits (3D ICs).
The paper presents a feasibility study on using a novel non-volatile memory technology.ECE Ph.D. candidate Yandong Luo has been recognized with the Best Student Paper Award at the 2022 Institute of Electrical and Electronics Engineers (IEEE) International
Harnessing the power of “phase-change” materials, Georgia Tech researchers have demonstrated how reconfigurable metasurfaces — artificial materials with extraordinary optical properties — are crucial to the future of nanotechnology.