The paper presents a physical design tool named Compact-2D that automatically builds high-density and commercial-quality monolithic three-dimensional integrated circuits (3D ICs).

Riley is an engineer at ECE’s National Electric Energy Testing, Research, & Applications Center (NEETRAC).

Paul Voss appointed to serve as Academic Director at Georgia Tech-Lorraine with oversight of all aspects of academic operations at Tech's European campus in Metz, France.

A team of Georgia Tech students and faculty members has won the U.S. Department of Energy’s (DOE) EcoCAR Mobility Challenge.

Multiple members of the School of Electrical and Computer Engineering (ECE) contributed to the four-year project.

The paper presents a feasibility study on using a novel non-volatile memory technology.ECE Ph.D. candidate Yandong Luo has been recognized with the Best Student Paper Award at the 2022 Institute of Electrical and Electronics Engineers (IEEE) International

The award recognizes exceptional performance in the classroom by a Georgia Tech faculty member.

The Center for Signal and Information Processing’s (CSIP) program honored past and current students for their outstanding research and service.

In June, some of the world’s top technologists in the VLSI industry will convene in Honolulu for one of the premier symposiums for microelectronics and semiconductor research.

In the award-winning article, an optimization-based algorithm for quick evaluation of the eye diagram, dubbed worst-eye analysis, is suggested.