Georgia Tech will be in the spotlight at the 71st International Electron Devices Meeting (IEDM).

The conference, which kicks off on Dec. 6 in San Francisco, will feature 13 accepted papers with first author attribution from the School of Electrical and Computer Engineering (ECE).

That achievement sets a record for Georgia Tech papers accepted at IEDM. It also places the Institute first among U.S. universities and second internationally for papers accepted at this year’s conference.

IEDM is considered the “Super Bowl of Semiconductors” to those in the field, where the biggest ideas and breakthroughs in chip technology have made their debut, ever since its founding in 1955. Top researchers, leading companies, and emerging innovations all converge at this premier event.

Three of the papers received invitations for a special issue for the TED journal:

• Experiments and Modeling of Defect Dynamics and BTI in Doped In2O3 TFTs Undergoing Densification during 400oC Post-BEOL Forming Gas Annealing (FGA), Yu-Hsin Kuo¹ , Chengyang Zhang¹ , Priyankka Gundlapudi Ravikumar¹ , Sanghyun Kang¹ , Taeyoung Song¹ , Marco A. Villena² , Luca Larcher³ , Hwan Kim⁴, Minji Hong⁴ , Pilsang Yun⁴ , Gaurav Thareja³ , Shimeng Yu¹ , Daewon Ha⁴ , Suman Datta ^1,5, Julia E. Medvedeva⁶ , Asif I. Khan^1,5 (1 ECE, Georgia Tech, 2 University of Granada, 3 Applied Materials, 4 Semiconductor R&D Center, Samsung Electronics Co. Ltd., 5 MSE, Georgia Tech, 6 Missouri University of Science & Technology)
• On the Localized Ferroelectric Phase Variation in Scaled FeFET: Experiments and Modeling, Omkar Phadke¹ , Minji Shon¹ , Stuart Wodzro¹ , Halid Mulaosmanovic² , Stefan Dünkel² , Sven Beyer² , Asif Khan¹ , Suman Datta ¹ , Shimeng Yu¹ (1 Georgia Institute of Technology, Atlanta, GA, USA, 2 GlobalFoundries Fab1 LLC and Company, 01109 Dresden, Germany)
• Monolithic 3D Integration of Dual-Gated ALD Oxide-Channel Non-Volatile Capacitive Memory on 40nm Si CMOS for Digital Compute-in-Memory, Junmo Lee¹, Chengyang Zhang¹, Siheon Park¹, Hyeonwoo Park¹, Tae-Hyeon Kim¹, Leo Jen-Chieh Liu², Elia Ambrosi², Mingyuan Song², Xinyu Bao², Meng-Fan Chang², Suman Datta¹, Shimeng Yu¹ (1 Georgia Institute of Technology, Atlanta, GA, USA; 2 Corporate Research, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan)

On top of that, Monolithic 3D Integration of Dual-Gated ALD Oxide-Channel Non-Volatile Capacitive Memory on 40nm Si CMOS for Digital Compute-in-Memory is nominated for the Best Student Paper Award.

The 10 other Georgia Tech papers being presented at the conference are:

• Array-Level Demonstration of Charge-Domain In-Memory Search using Back-End-of-Line Compatible Ferroelectric Nonvolatile Capacitors, Omkar Phadke¹*, Junmo Lee¹*, Po-Kai Hsu¹, Chengyang Zhang¹, Asif Khan¹, Suman Datta¹, Shimeng Yu¹ (1 Georgia Institute of Technology, Atlanta, GA, USA, *Equally contributed authors)
• DTCO of Multi-Tier CFETs: Ultimate Logic and SRAM Scaling of A5 Technology and Beyond, Minji Shon¹*, Seongkwang Lim¹*, Shimeng Yu¹ (1 Electrical and Computer Engineering, Georgia Institute of Technology *Equally contributed authors)
• Direct Observation of Nanoscale Polarization Switching in HZO Ferroelectrics Using STEM-EBIC, Prasanna Venkatesan Ravindran¹, Yueyun Chen², Tristan O'Neill², Ho Chan², Hari Jayasankar¹, Priyankka Ravikumar¹, Zekai Wang¹, Shelby Fields³, Megan Lenox³, William Hubbard⁴, Andrea Padovani⁵, Luca Larcher⁶, Gaurav Thareja⁶, Shimeng Yu¹, Jon Ihlefeld³, Wanki Kim⁷, Daewon Ha⁷, Brian Reagan², Asif Khan¹ (1 Georgia Institute of Technology, 2 University of California Los Angeles, 3 University of Virginia, 4 NanoElectronic Imaging, 5 University of Modena and Reggio Emilia, 6 Applied Materials, 7 Samsung Electronics)
• Fluid Imprint: A Reliability Bottleneck in Ferroelectric RAM Read Operation, Hyeonwoo Park¹*, Jaewon Shin¹*, Emmanuel Quezada¹, Hyun Jae Lee¹, Eknath Sarkar¹, Shimeng Yu¹, Asif Islam Khan¹, Supratik Guha², Wilfried Haensch², Suman Datta¹ (1 School of Electrical and Computer Engineering, Georgia Institute of Technology, 2 Pritzker School of Molecular Engineering, University of Chicago, *Equally contributed authors)
• Overcoming Threshold Voltage-Performance-Stability Tradeoff with Double-Gate Gallium Doped In2O3 MOSFETs using Tri-Layer HfO2-ZrO2-HfO2 Gate Stack, Eknath Sarkar¹*, Hyeonwoo Park¹*, Md Abdullah Al Mamun²*, Hyun Jae Lee¹, Dyutimoy Chakraborty¹, Emmanuel Quezada¹, Chengyang Zhang¹, Sharadindugopal Kirtania¹, Mengkun Tian¹, Asif I Khan¹, Shimeng Yu¹, Kyeongjae Cho², Hwan Kim³, Changik Im³, M.J Hong³, Daewon Ha³, Suman Datta¹ (1 School of Electrical and Computer Engineering, Georgia Institute of Technology, 2 Department of Materials Science and Engineering, University of Texas at Dallas, 3 Semiconductor Research and Development, Samsung Electronics Co., Ltd, *Equally contributed authors)
• Experimental Demonstration of Robust High Temperature Operation with 104 Endurance and Stable VTh at 125oC Enabled by IL Scavenging in Si Channel FEFETs, Priyankka Ravikumar¹, Andrea Padovani², Chinsung Park¹, Prasanna Venkatesan¹, Malak Desouky¹, Shimeng Yu¹, Luca Larcher³, Gaurav Thareja³, Kijoon Kim⁴, Kwangyou Seo⁴, Kwangsoo Kim⁴, Wanki Kim⁴, Daewon Ha⁴, Asif Khan¹ (1 Georgia Institute of Technology, GA, USA; 2 DISMI, University of Modena and Reggio Emilia, Italy; 3 Applied Materials; 4 Samsung Electronics Co., Ltd., South Korea)
• Demonstration of 3T0C Gain Cells with Self-Aligned Oxide Transistors for Parasitic-Aware Design at Array-level, Sunbin Deng¹*, Jay V Sonawane¹*, Faaiq G Waqar¹*, Omkar Phadke¹*, Chengyang Zhang¹, Ming-Yen Lee¹, Shimeng Yu¹, Suman Datta¹ (1 Georgia Institute of Technology *Equally contributed authors)
• VLPred: Accelerated Endurance Prediction Platform Enabled by AI Surrogates, Prasanna Venkatesan Ravindran¹, Congrui Li¹, Andrea Padovani², Zekai Wang¹, Hari Jayasankar¹, Priyankka Ravikumar¹, Mohammad Nabian³, Kaustubh Tangsali³, Sheel Nidhan³, Janaki Vamaraju³, Ram Cherukuri³, Prakhar Mathur³, Enrico Piccinini⁴, Riccardo Foiera⁴, Roman Gafiteanu⁴, Khandekar Akif Aabrar¹, Suman Datta¹, Surya Kalidindi¹, Luca Larcher⁴, Asif Khan¹, Yiyi Wang³, Gaurav Thareja⁴ (1 Georgia Institute of Technology, 2 University of Modena and Reggio Emilia, 3 NVIDIA, 4 Applied Materials)
• High-Efficiency BEOL-Compatible On-Chip Switched Capacitor DC-DC Converter Using Planar and Vertical Oxide Transistors with Trench Capacitors, Sunbin Deng¹*, Hung-Chun Chou¹*, Chengyang Zhang¹*, Jungyoun Kwak¹*, Arun Dandapani Asokan¹, Emmanuel Quezada¹, Eknath Sarkar¹, Junmo Lee¹, Jaewon Shin¹, Dyutimoy Chakraborty¹, Visvesh S Sathe¹, Shimeng Yu¹, Suman Datta¹ (1 Georgia Institute of Technology *Equally contributed authors)
• DC and AC PBTI / NBTI Analysis for BEOL Oxide FETs via On-the-Fly Measurement and Modeling, Hyun Jae Lee¹*, Hyeonwoo Park¹*, Chengyang Zhang¹, Jaewon Shin¹, Eknath Sarkar¹, Hwan Kim², Changik Im², Min Ji Hong², Daewon Ha², Shimeng Yu¹, Asif Islam Khan¹, Suman Datta¹ (1 Electrical and Computer Engineering, Georgia Institute of Technology, 2 Samsung Electronics *Equally contributed authors)

Two additional papers from Notre Dame University include attributed contributions from ECE Ph.D. students Lance Fernandes and Po-Kai Hsu, Associate Professor Asif Khan, and Professor Shimeng Yu:

• Comprehensive Evaluation of Challenges in Realizing Disturb-Free Ferroelectric Vertical NAND via String-Compatible Independent Pass Gates
• Securing 3D NAND Without Density Loss via In-Situ Encryption Using a Single Transistor XOR Cell

Khan and Yu also hold leadership positions at the upcoming conference.

Khan will serve as the co-chair for Session 22: : EDT | Advances in Oxide Semiconductor Devices: Physics, Integration, and Reliability and on the Emerging Device and Compute Technology committee.

Yu is a co-chair for Session 3: MT | Embedded Memory and Selector Only Memory and Session 12: MT | Ferroelectric Memories, while also sitting on the committee for Memory Technology.

See the full conference program here.