Georgia Tech School of Electrical and Computer Engineering Professor (ECE) Azad Naeemi was appointed to the Dean’s Professorship, effective June 1, 2025. 

Naeemi, who is an ECE graduate and joined the faculty in 2008, was selected to the five-year appointment for his exceptional record of scholarship and service to the Institute. Criteria for the designation of Dean's Professor include outstanding scholarship, dedication to education, and excellence in service at Institutional and national/international levels.

His research crosses the boundaries of materials, devices, circuits, and systems investigating integrated circuits based on conventional and emerging nanoelectronic and spintronic devices and interconnects.

Currently, the main focus of Naeemi’s research is to develop a comprehensive end-to-end modeling and optimization framework for emerging memory and logic devices starting with fundamental physics to devices, and then to circuits and applications.

He conducts this research out of the Nanoelectronics Research Lab, where is the director. Ferroelectric and magnetic devices are of particular interest for his group. They are also working on an academic process design kit (PDK) for one of the most advanced CMOS technology nodes (3nm) to enable Design-Technology Co-Optimization (DTCO).

Naeemi leads a six-university effort supported by the National Science Foundation to develop and evaluate interactive visualizations and simulation tools that help students gain better conceptual understanding of semiconductor physics and devices. The tools from this effort are being used by thousands of students around the world.

He’s received a number of prestigious awards, including the IEEE Electron Devices Society (EDS) Paul Rappaport Award for the best paper at the 2007 IEEE Transactions on Electron Devices, an NSF CAREER Award, an SRC Inventor Recognition Award, and several best paper awards at international conferences. He is also the first recipient of the IEEE Solid-State Circuits Society James D. Meindl Innovators Award. Judged by the direct vote of the ECE senior class, he was awarded W. Marshall Leach/Eta Kappa Nu Outstanding Senior Teacher Award in 2023.

In addition to his educational and research responsibilities, he also serves as the Editor-in-Chief of the IEEE Journal on Exploratory Computational Devices and Circuits and is the Associate Director for Computation for the NSF-supported National Nanotechnology Coordinated Infrastructure.

Naeemi has been at Georgia Tech since 1999, first a graduate student, getting his M.S. and Ph.D. degrees in electrical and computer engineering from the Institute in 2001 and 2003, respectively.

He then worked as a research engineer in the Microelectronics Research Center at Georgia Tech from 2004 to 2008, before joining the ECE faculty.

Prior to Georgia Tech, he received his B.S. degree in electrical engineering from Sharif University, Tehran, Iran in 1994. After his undergraduate studies, he stayed in Tehran, where he worked as a design engineer with Partban and Afratab Companies.