Official Job Title
Professor
Endowed Chair and Professorships Titles
Dean’s Professorship
Job Title(s)
Email Address
Telephone
Office Building
MiRC
Office Room Number
216
Technical Interest Group(s)
Biography

Professor Naeemi received his B.S. degree in electrical engineering from Sharif University, Tehran, Iran in 1994, and his M.S. and Ph.D. degrees in electrical and computer engineering from the Georgia Institute of Technology, Atlanta, Ga. in 2001 and 2003, respectively.

Prior to his graduate studies (from 1994 to 1999), he was a design engineer with Partban and Afratab Companies, both located in Tehran, Iran. He worked as a research engineer in the Microelectronics Research Center at Georgia Tech from 2004 to 2008 and joined the ECE faculty at Georgia Tech in fall 2008.

His technical research crosses the boundaries of materials, devices, circuits, and systems, investigating integrated circuits based on conventional and emerging nanoscale devices and interconnects. His educational research includes experiential learning environments and their impact on conceptual understanding of scientific and engineering topics. He serves as the Editor-in-Chief of the IEEE Journal on Exploratory Computational Devices and Circuits (JXCDC) and is the Associate Director for Computation for the NSF-supported National Nanotechnology Coordinated Infrastructure (NNCI). He is a recipient of the IEEE Electron Devices Society (EDS) Paul Rappaport Award, the Inaugural IEEE Solid-State Circuits Society (SSCS) James Meindl Innovators Award, an NSF CAREER Award, an SRC Inventor Recognition Award, and several best paper awards from international conferences. 

Education
  • Ph.D., Electrical and Computer Engineering, Georgia Institute of Technology, 2003
  • M.S., Electrical and Computer Engineering, Georgia Institute of Technology, 2001
Research Interests

Professor Naeemi’s research centers on nanoscale electronic devices and novel semiconductor materials. His work investigates the fundamental physical mechanisms governing device performance at the nanoscale, including quantum transport and materials interfaces. He explores innovative device architectures to overcome scaling challenges in integrated circuits, integrating modeling, simulation, and experimental approaches to advance next‑generation electronic components.

Teaching Interests

Professor Naeemi’s teaching interests emphasize core courses in electrical and computer engineering at both undergraduate and graduate levels. He focuses on solid‑state devices, semiconductor technology, and nanoelectronics, providing students with foundational knowledge in device physics and circuit design. His instruction integrates theory with practical applications, fostering analytical skills and a deep understanding of emerging technologies in nanoscale electronics.

Distinctions & Awards
  • Faculty Honors Class of 1934 Outstanding Innovative Use of Educational Technology Award, Georgia Tech, Feb. 2023.
  • W. Marshall Leach/Eta Kappa Nu Outstanding Senior Teacher Award, School of ECE, Georgia Tech, May 2023 (determined by the vote of the ECE senior class).
  • IEEE Solid-State Circuits Society James D. Meindl Innovators Award, 2022
  • Richard M. Bass/Eta Kappa Nu Outstanding Teacher Award - selected by the vote of the ECE senior class, 2014
  • ECE Outstanding Junior Faculty Member Award
  • 2014 NSF CAREER Award, 2013
  • General Co-Chair, IEEE Int. Interconnect Technology Conf., 2013
  • SRC Inventor Recognition Award, 2010
  • IEEE EDS Paul Rappaport Award, 2008
  • Senior Member, IEEE
  • Colonel Oscar P. Cleaver Award, given by the School of ECE at Georgia Tech, 2000
Publications
  • D. Shim et al., GT3: an open‑source 3nm GAAFET PDK…, IEEE T‑ED 72(4), 1582–1588, 2025
  • M.M. Islam et al., Switching Dynamics of Antiferroelectric Capacitor…, IEEE JEDS 13, 422–426, 2025
  • S. Narla, P. Kumar, A. Naeemi, 5T‑2MTJ SOT‑based ternary CAM…, IEEE Trans. Magnetics 61(10), 2025
  • P. Kumar, D.E. Shim, A. Naeemi, Device‑to‑system co‑design for SOT‑MRAM at 7nm, IEEE JXCDC 11, 139–147, 2025
  • M. Adnaan et al., Benchmarking of FERAM based memory system…, IEEE JXCDC 11, 99–106, 2025