Lim’s DARPA assignment is supported by the U.S. Department of Defense’s (DoD) Intergovernmental Personnel Act (IPA).

The award-winning article proposes a novel hierarchical physical design flow enabling the building of high-density and commercial-quality two-tier face-to-face-bonded hierarchical 3D ICs.

DAC is a premier event devoted to the design and design automation of electronic chips and systems.

The paper presents a physical design tool named Compact-2D that automatically builds high-density and commercial-quality monolithic three-dimensional integrated circuits (3D ICs).

In the award-winning article, an optimization-based algorithm for quick evaluation of the eye diagram, dubbed worst-eye analysis, is suggested.

IEEE Fellow is a distinction reserved for select IEEE members whose extraordinary accomplishments.