Research from Georgia Tech School of Electrical and Computer Engineering Ph.D. candidate Rakshith Saligram received high recognition at the Design Automation Conference in San Francisco, Calif. in June.

Saligram’s paper, “Cryogenic CMOS for High Performance Computing," won third place in the conference’s Ph.D. Forum.

Cryogenic CMOS for high performance computing is a radical idea that proposes the use of ultra-low temperature devices (~77K/-196C) for server and cloud computing applications. It has gained traction due to the soaring energy costs of data center operation.

The research Rakshith presented at the conference focused on the modeling of devices and interconnects, design technology co-optimization, benchmarking and design of memory macro test chips to demonstrate the system level benefits of cryo-CMOS.

The Ph.D. Forum is a poster session hosted by the Association for Computing Machinery Special Interest Group on Design Automation and IEEE Council on Electronic Design Automation for Ph.D. students to present and discuss their dissertation research with people in the electronic design automation community.

It has become one of the premier forums for Ph.D. students in design automation to get feedback on their research and for industry to see academic work in progress. Hundreds of people attended the forums, and participation is competitive with an acceptance rate of around 30 percent.

Rakshith is a member of the Integrated Circuits and Systems Research Lab and advised by ECE Steve W. Chaddick School Chair Arijit Raychowdhury.

He will be joining the faculty of the University of Tennessee, Knoxville at the start of the Fall 2024 semester.