Shaolan Li received his B.Eng. degree with highest honor from the Hong Kong University of Science and Technology (HKUST) in 2012, and the Ph.D. degree from the University of Texas (UT) at Austin in 2018, all in electrical engineering. Prior joining Georgia Tech as an assistant professor in 2019, he was a post-doctoral fellow in the Department of Electrical and Computer Engineering at UT Austin from 2018-2019. He also held intern positions in Broadcom Ltd. in Sunnyvale, California, and NXP in Tempe, Arizona during 2013-2014. His research interests are broadly in analog, mixed-signal, and RF integrated circuits. His expertise is in high-performance data converters, ultra-low-power low-cost sensor interface, and novel analog mixed-signal architectures for design automation.
Dr. Li is the recipient of the IEEE Solid-State Circuit Society Predoctoral Achievement Award in 2018. He also received the HKUST Academic Achievement Medal in 2012 and the UT Austin Cockrell School of Engineering Fellowship in 2017, respectively. He is member of the IEEE Solid-State Circuit Society and the IEEE Circuits and Systems Society.
- Analog, mixed-signal, and RF integrated circuits
- Sensors and bioelectronic interfaces
- Analog circuit design automation
- IEEE Solid-State Circuit Society Pre-Doctoral Achievement Award, 2018
- UT Austin Cockrell School of Engineering Fellowship, 2017
- HKUST Academic Achievement Medal, 2012
Shaolan Li, Wenda Zhao, Biying Xu, Xiangxing Yang, Xiyuan Tang, Linxiao Shen, Nanshu Lu, David Pan and Nan Sun, “A 0.025-mm2 0.8-V 78.5dB-SNDR VCO-based Sensor Readout Circuit in a Hybrid PLL-ΔΣM Structure, IEEE Custom Integrated Circuits Conference (CICC), Apr. 2019.
Shaolan Li, Arindam Sanyal, Kyoungtae Lee, Yeonam Yoon, Xiyuan Tang, Yi Zhong, Kareem Ragab, and Nan Sun, “Advances in Voltage-Controlled-Oscillator-Based ΔΣ ADCs,” IEICE Transactions on Electronics, Vol.E102-C, No. 7, pp. 509-519, Jul. 2019 (invited review article).
Jiaxin Liu, Shaolan Li, Wenjuan Guo, Guangjun Wen, and Nan Sun, “A 0.029-mm2 17-fJ/Conversion-Step Third-Order CT ΔΣ ADC With a Single OTA and Second-Order Noise-Shaping SAR Quantizer,” IEEE Journal of Solid-State Circuits, vol. 54, no. 2, pp. 428-440, Feb. 2019.
Xiyuan Tang, Shaolan Li, Linxiao Shen, Wenda Zhao, Xiangxing Yang, Randy Williams, Jiaxin Liu, Zhichao Tan, Neal Hall, Nan Sun, “A 16fJ/conversion-step Time-Domain Incremental Zoom Capacitance-to-Digital Converter,” IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2019.
Shaolan Li, Biying Xu, David Pan and Nan Sun, “A 60-fJ/step 11-ENOB VCO-based CTDSM Synthesized from Digital Standard Cell Library,” IEEE Custom Integrated Circuits Conference (CICC), Apr. 2019.
Shaolan Li, Bo Qiao, Miguel Gandara, and Nan Sun, “A 13-bit ENOB 2nd-order Noise-Shaping SAR ADC Realizing Optimized NTF Zeros Using the Error-Feedback Structure,” IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2018.
Shaolan Li, Qiao Bo, Miguel Gandara, David Pan, and Nan Sun, “A 13-ENOB Second-Order Noise-Shaping SAR ADC Realizing Optimized NTF Zeros Using the Error-Feedback Structure,” IEEE Journal of Solid-State Circuits, vol. 53, no. 12, pp. 3484-3496, Dec. 2018.
Shaolan Li, Abhishek Mukherjee, and Nan Sun, “A 174.3dB FoM VCO-Based CT ΔΣ Modulator with a Fully Digital Phase Extended Quantizer and Tri-Level Resistor DAC in 130nm CMOS,” IEEE Journal of Solid-State Circuits, vol. 52, no. 7, pp. 1940-1952, Jul. 2017.
Shaolan Li and Nan Sun, “A 0.028mm2 19.8fJ/step 2nd-Order VCO-based CT Delta Sigma Modulator Using an Inherent Passive Integrator and Capacitive Feedback in 40nm CMOS,” IEEE Symposium on VLSI Circuits (VLSI), Jun. 2017.
Last revised August 13, 2021