Asynchronous and Self Timed Systems
(3-0-0-3)
CMPE Degree: This course is Not Applicable for the CMPE degree.
EE Degree: This course is Not Applicable for the EE degree.
Lab Hours: 0 supervised lab hours and 0 unsupervised lab hours.
Technical Interest Group(s) / Course Type(s): VLSI Systems and Digital Design
Course Coordinator:
Prerequisites: ECE 6130
Corequisites: None.
Catalog Description
Specification and design of asynchronous digital systems.Textbook(s)
Course Outcomes
Not Applicable
Student Outcomes
In the parentheses for each Student Outcome:"P" for primary indicates the outcome is a major focus of the entire course.
“M” for moderate indicates the outcome is the focus of at least one component of the course, but not majority of course material.
“LN” for “little to none” indicates that the course does not contribute significantly to this outcome.
1. ( Not Applicable ) An ability to identify, formulate, and solve complex engineering problems by applying principles of engineering, science, and mathematics
2. ( Not Applicable ) An ability to apply engineering design to produce solutions that meet specified needs with consideration of public health, safety, and welfare, as well as global, cultural, social, environmental, and economic factors
3. ( Not Applicable ) An ability to communicate effectively with a range of audiences
4. ( Not Applicable ) An ability to recognize ethical and professional responsibilities in engineering situations and make informed judgments, which must consider the impact of engineering solutions in global, economic, environmental, and societal contexts
5. ( Not Applicable ) An ability to function effectively on a team whose members together provide leadership, create a collaborative and inclusive environment, establish goals, plan tasks, and meet objectives
6. ( Not Applicable ) An ability to develop and conduct appropriate experimentation, analyze and interpret data, and use engineering judgment to draw conclusions
7. ( Not Applicable ) An ability to acquire and apply new knowledge as needed, using appropriate learning strategies.
Strategic Performance Indicators (SPIs)
Not Applicable
Course Objectives
Topical Outline
Introduction
Synchronous Models
Asynchronous Models
Equipotential Region
Clock Skew, Certainty Region
Self-timed signalling
The weak constraints
Completion signals
ternary coding
two-phase vs. four-phase signalling
Classical Asynchronous Systems
Fundamental Mode Circuits, Flow Table Description
Synthesis Procedures, Race Free State Assignment, Essential Hazards
Micropipelines
stage construction
primitive operators
Physical Constraints
Arbitration/metastability - the steering circuit
The isochronic fork
Formal specification
Graph/Petri net specification
Synthesis procedures/production rule systems
Verification: trace theory/temporal logic
Design Examples
The Asynchronous Microprocessor
Router/Distributed mutual exclusion
Performance evaluation