Asynchronous and Self Timed Systems
(3-0-0-3)
CMPE Degree: This course is N/A for the CMPE degree.
EE Degree: This course is N/A for the EE degree.
Lab Hours: 0 supervised lab hours and 0 unsupervised lab hours.
Technical Interest Groups / Course Categories: VLSI Systems and Digital Design
Course Coordinator:
Prerequisites: ECE 6130
Catalog Description
Specification and design of asynchronous digital systems.Textbook(s)
Course Outcomes
Not Applicable
Strategic Performance Indicators (SPIs)
Not Applicable
Topic List
Introduction Synchronous Models Asynchronous Models Equipotential Region Clock Skew, Certainty Region Self-timed signalling The weak constraints Completion signals ternary coding two-phase vs. four-phase signalling Classical Asynchronous Systems Fundamental Mode Circuits, Flow Table Description Synthesis Procedures, Race Free State Assignment, Essential Hazards Micropipelines stage construction primitive operators Physical Constraints Arbitration/metastability - the steering circuit The isochronic fork Formal specification Graph/Petri net specification Synthesis procedures/production rule systems Verification: trace theory/temporal logic Design Examples The Asynchronous Microprocessor Router/Distributed mutual exclusion Performance evaluation