Gigascale Integration
(3-0-0-3)
CMPE Degree: This course is Not Applicable for the CMPE degree.
EE Degree: This course is Not Applicable for the EE degree.
Lab Hours: 0 supervised lab hours and 0 unsupervised lab hours.
Technical Interest Group(s) / Course Type(s): Nanotechnology
Course Coordinator:
Prerequisites: ECE 3080
Catalog Description
Hierarchy of physical principles that enable understanding andestimation of future opportunities to achieve multibillion transistor
silicon chips using sub-0.25 micron technology.
Textbook(s)
Course Outcomes
Not Applicable
Strategic Performance Indicators (SPIs)
Not Applicable
Topical Outline
1. Fundamental Limits:
a. Laws of thermodynamics
b. Uncertainty Principle
c. Speed of light
d. Quantum resistance
e. Quantum capacitance
f. Kinetic inductance
2. Material Limits:
a. Semiconductors,
b. Insulators
c. Conductors
d. Ferroelectrics
e. Ferromagnets
f. 1D and 2D materials
3. Device Limits:
a. Planar Si MOSFETs
b. FinFETs
c. Horizontal and Vertical FETs
d. Ballistic Transistors,
e. Ferroelectric Transistors
f. Spin Transfer Random Access Memory (STT-RAM)
g. Memristors
4. Circuit Limits:
a. Static transfer curve,
b. Switching energy
c. Propagation delay time of a binary logic circuit
d. Fault and defect tolerant circuit design,
e. Crossbar Circuits,
5. System Limits:
a. Wiring Demand
b. Critical Path Delay
c. Power Density
d. Heat removal
e. Novel computing paradigms (e.g. Deep neural networks, Near- or in-memory computing)