Digital Systems Test
CMPE Degree: This course is Not Applicable for the CMPE degree.
EE Degree: This course is Not Applicable for the EE degree.
Lab Hours: 0 supervised lab hours and 0 unsupervised lab hours.
Technical Interest Group(s) / Course Type(s): VLSI Systems and Digital Design
Course Coordinator: Abhijit Chatterjee
Catalog DescriptionCourse covers the science of digital systems testing, fault models, algorithms for fault simulation and test generation, design for testability and built-in self-test.
Textbook(s)Digital Systems Testing and Testable Design
Student OutcomesIn the parentheses for each Student Outcome:
"P" for primary indicates the outcome is a major focus of the entire course.
“M” for moderate indicates the outcome is the focus of at least one component of the course, but not majority of course material.
“LN” for “little to none” indicates that the course does not contribute significantly to this outcome.
1. ( Not Applicable ) An ability to identify, formulate, and solve complex engineering problems by applying principles of engineering, science, and mathematics
2. ( Not Applicable ) An ability to apply engineering design to produce solutions that meet specified needs with consideration of public health, safety, and welfare, as well as global, cultural, social, environmental, and economic factors
3. ( Not Applicable ) An ability to communicate effectively with a range of audiences
4. ( Not Applicable ) An ability to recognize ethical and professional responsibilities in engineering situations and make informed judgments, which must consider the impact of engineering solutions in global, economic, environmental, and societal contexts
5. ( Not Applicable ) An ability to function effectively on a team whose members together provide leadership, create a collaborative and inclusive environment, establish goals, plan tasks, and meet objectives
6. ( Not Applicable ) An ability to develop and conduct appropriate experimentation, analyze and interpret data, and use engineering judgment to draw conclusions
7. ( Not Applicable ) An ability to acquire and apply new knowledge as needed, using appropriate learning strategies.
Strategic Performance Indicators (SPIs)
Outcome 1 (Students will demonstrate expertise in a subfield of study chosen from the fields of electrical engineering or computer engineering):
Enter one or two course-specific replacements for Outcome 1: Upon successful completion of the course, the student should be able to:
1. Apply a fault simulation algorithm to combinational logic that produces a list of detected stuck-at faults given a set of test vectors for the circuit. Concurrent and deductive fault simulation algorithms are commonly used for such problems.
Outcome 2 (Students will demonstrate the ability to identify and formulate advanced problems and apply knowledge of mathematics and science to solve those problems):
1. Apply a test stimulus generation algorithm such as D-ALG or PODEM to generate tests for targeted stuck-at faults in combinational circuits.
Outcome 3 (Students will demonstrate the ability to utilize current knowledge, technology, or techniques within their chosen subfield):
1. Design a Linear Feedback Shift Register (LFSR) to perform Signature Analysis (serve as a single-input signature register).
1. Motivation - why test ?
2. Failure mechanisms and yield models
a. parametric vs. catastrophic faults
b. impact of scaled technologies
3. Theory of digital stuck-at fault testing
a. basic concepts
b. fault excitation and sensitization
c. redundant faults and coverage
d. multiple faults
4. Circuit and fault simulation methods
a. digital circuits, parallel, deductive and concurrent
b. analog circuits
5. Test generation algorithms and test methods
a. digital, stuck-at and delay faults
b. delay fault testing
6. Memory Testing
a. March tests
b. Testing for pattern sensitive failures
7. Current based testing methods
8. Design for testability techniques
b. JTAG, boundary scan
c. test response compression
9. Built-in self-test
a. LFSR theory
b. built-in test architectures
10. Self-calibration techniques
a. post manufacture circuit tuning for repair/yield-enhancement
11. New topics in test
a. analog/mixed-signal circuit testing
b. testing of deeply scaled CMOS devices
12. test methods for neuromorphic networks