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ECE Course Syllabus

ECE6444 Course Syllabus


Silicon-Based Heterostructure Devices and Circuits (3-0-0-3)

Lab Hours
0 supervised lab hours and 0 unsupervised lab hours

Technical Interest
Electronic Design and Applications,Nanotechnology

Course Coordinator
Cressler,John D

ECE 3040 (required) and ECE 3450 (optional)


Catalog Description
Theory and design of novel silicon-germanium microelectronic devices and circuits. Materials, device physics, fabrication, measurement, circuit design, and system applications.

J. D. Cressler, G. Niu, Silicon-Germanium Heterojunction Bipolar Transistors, Artech House, 2003. ISBN 9781580533614 (required)

J. D. Cressler, G. Niu, The Silicon Hererostructure Handbook: Materials, Fabrication, Devices, Circuits, and Applications of SiGe and Si Strained Layer Epitaxy, CRC Press, 2006. ISBN 9780849335594(optional)

Indicators (SPIs)
SPIs are a subset of the abilities a student will be able to demonstrate upon successfully completing the course.

Outcome 1 (Students will demonstrate expertise in a subfield of study chosen from the fields of electrical engineering or computer engineering):
1.	Understand the history and evolution of Si/SiGe heterostructure technology
2.	Understand physics of Si/SiGe devices 

Outcome 2 (Students will demonstrate the ability to identify and formulate advanced problems and apply knowledge of mathematics and science to solve those problems):
1.	Assess the dependence of Si/SiGe devices on SiGe material layer composition
2.	Quantify changes in circuit-relevant performance metrics (gain, noise, linearity)

Outcome 3 (Students will demonstrate the ability to utilize current knowledge, technology, or techniques within their chosen subfield):
1.	Determine best circuit types suited for use in Si/SiGe technology
2.	Quantify circuit performance leverage and tradeoffs for these circuits

Topical Outline
1. Introduction
   a. historical perspective
   b. application-induced device design constraints
   c. bandgap engineering in the Si material system
   d. SiGe vs III-V vs Si
   e. the state-of-the-art
2. Epitaxial SiGe Alloys	
   a. strained-layer epitaxy
   b. stability constraints
   c. growth techniques
   d. band structure and band alignments
   e. carrier transport properties
3. The SiGe Heterojunction Bipolar Transistor (SiGe HBT)
   a. review of Si BJT device physics  		
   b. device fabrication and structural design
   c. process integration issues with CMOS
   d. dc and ac properties
   e. second-order device phenomena
   f. temperature effects
4. Circuit Design with SiGe HBTs
   a. application-driven profile optimization 
   b. low-frequency noise
   c. broadband noise
   d. linearity
   e. compact modeling issues
   f. design example: a SiGe HBT LNA
5. Other Si-Based Heterostructure Devices 
   a. SiGe-channel FETs
   b. strained-Si CMOS
   c. SiGe-based resonant tunneling devices
   d. SiGe-based optoelectronics devices 
6. Future Directions