As the premier forum for microarchitecture ideas, many of the industry’s foremost experts were in Austin, Texas for the 2024 IEEE/ACM International Symposium on Microarchitecture (MICRO).

Out of all the bright minds at the 57th symposium, those from Georgia Tech were some of the most prominent.

Between the award-winning research, accepted papers, keynote presentations, and workshops, researchers and alumni from a number of Georgia Tech schools had a successful weekend.

Recent School of Electrical and Computer Engineering (ECE) Ph.D. graduates Saeed Rashidi (ECE ’23), now a AI/HPC Network Engineer at Meta, and Poulami Das (ECE ’23), currently an assistant professor at the University of Texas at Austin, each won the ACM SIGMICRO Best Dissertation Award.

The SIGMICRO Dissertation Award is an annual award that recognizes excellent thesis research by doctoral candidates in the field of computer microarchitecture within the last calendar year.

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Saeed Rashidi
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Das

Rashidi was recognized for his dissertation titled, “HW-SW Methods for Modeling and Optimizing Communication for Scalable Training of Deep Learning Models,” citing its work developing the ASTRA-sim simulation framework for identifying and addressing communication challenges in next generation distributed AI systems at scale. Rashidi was advised by School of ECE Associate Professor Tushar Krishna.

Das’s dissertation, “Software and Architecture Techniques For Improving Fidelity of Emerging Quantum Computers,” won for developing software and architecture techniques to increase the throughput and reliability of emerging quantum computers. Das was advised by School of Computer Science Professor Moinuddin Qureshi.

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Qureshi

Qureshi was honored with the Test of Time Award for his 2006 paper, "Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches.”

The award is the highest honor an academic paper can receive for its impact and recognizes a MICRO paper whose influence is still felt 18-22 years after its initial publication. It received the award for improving shared cache performance by demonstrating that shared cache space should be allocated based on utility rather than demand and proposing a low-overhead runtime mechanism to measure utility and partition shared caches.

A number of other Georgia Tech-affiliated researchers were recognized at the event:

  • Best Paper Award: 
    • Fusion-3D: Integrated Acceleration for Instant 3D Reconstruction and Real-TimeRendering 
      Sixu Li, Yang Zhao, Chaojian Li, Bowei Guo, Jingqun Zhang, Wenbo Zhu, Zhifan Ye, Cheng Wan, and Yingyan (Celine) Lin (Georgia Tech)
      • The research was praised for its "compelling end-to-end demonstration of an emerging application of importance," per the selection committee. The project was supported by the CoCoSys center via the SRC-DARPA JUMP 2.0 program.
  • Best Paper Award Runner Up:
    • Hardware-Assisted Virtualization of Neural Processing Units for Cloud Platforms
      Yuqi Xue, Yiqi Liu (University of Illinois Urbana-Champaign); Lifeng Nai (Google); Jian Huang (University of Illinois Urbana-Champaign)*
      • Jian Huang is a 2017 Georgia Tech Computer Science Ph.D. graduate advised by Qureshi
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Best Paper
  • Best Paper Award Nominee:
    • A Case for Speculative Address Translation with Rapid Validation for GPUs
      Junhyeok Park, Osang Kwon, Yongho Lee, Seongwook Kim, Gwangeun Byeon, Jihun Yoon (Sungkyunkwan University); Prashant J. Nair (The University of British Columbia*); Seokin Hong (Sungkyunkwan University)
      • Prashant Nair is a 2017 Georgia Tech ECE Ph.D. graduate advised by Qureshi

ECE Ph.D. students Akshat Ramachandran and Zishen Wan finished second and third in the Graduate category of the Student Research Competition for their respective papers, “MicroScopiQ: Accelerating Foundational Models through Outlier-Aware Microscaling Quantization,” and “Demystifying Neuro-Symbolic AI through Workload Characterization and Software-Hardware Co-Design.”

Two Georgia Tech alumni also received the high honor of being inducted into the MICRO Hall of Fame. Jian Huang (CS ’17), who is currently an assistant professor at the University of Illinois at Urbana Champaign and Prashant Nair (ECE ’17), who is an assistant professor at the University of British Columbia, were part of the latest class of inductees.

Seven papers with Georgia Tech authors were accepted to the symposium:

  • TACOS: Topology-Aware Collective Algorithm Synthesizer for Distributed Machine Learning
    William Won (Georgia  Tech); Midhilesh Elavazhagan, Sudarshan Srinivasan (Intel); Swati Gupta (MIT); Tushar Krishna (Georgia Institute of Technology)
  • Flag-Proxy Networks: Overcoming Architectural Scheduling and Decoding Obstacles in Quantum LDPC Codes
    Suhas Vittal (Georgia Tech); Ali Javadi, Andrew W. Cross, Lev Bishop (IBM T.J Watson Research Center); Moinuddin Qureshi (Georgia Tech)
  • MINT: Securely Mitigating Rowhammer with a Minimalist In-DRAM Tracker
    Moinuddin Qureshi (Georgia Tech); Salman Qazi (Google); Aamer Jaleel (NVIDIA)
  • ImPress: Securing DRAM Against Data-Disturbance Errors via Implicit Row-Press Mitigation
    Anish Saxena (Georgia Tech); Aamer Jaleel (NVIDIA); Moinuddin Qureshi (Georgia Tech)
  • Unleashing CPU Potential for Executing GPU Programs through Compiler/Runtime Optimizations
    Ruobing Han, Jisheng Zhao, Hyesoon Kim (Georgia Tech)
  • StarNUMA: Mitigating NUMA Challenges with Memory Pooling
    Albert Cho, Alexandros Daglis (Georgia Tech)
  • Fusion-3D: Integrated Acceleration for Instant 3D Reconstruction and Real-Time Rendering
    Sixu Li, Yang Zhao, Chaojian Li, Bowei Guo, Jingqun Zhang, Wenbo Zhu, Zhifan Ye, Cheng Wan, Yingyan (Celine) Lin (Georgia Institute of Technology)

Georgia Tech had a large part in the educational experience at MICRO as well.

Qureshi gave a keynote speech to kick off the first day of the event. Titled, “Reliability Matters: From Extending Moore’s Law to Enabling Quantum Leap,” it shared his group’s recent work on dynamic random-access memory reliability and quantum computing to show how efficiently addressing device failures can help push the boundaries of Moore's Law and enable quantum computing.

There were also three workshop/tutorials organized by Georgia Tech representatives:

  • NSF workshop on “Generative AI for Hardware Design and Hardware Design for Generative AI (AI4HW & HW4AI)” by Yingyan (Celine) Lin (Georgia Tech), Amir Yazanbakhsh (Google Deep Mind, GT PhD Alum), and Danella Zhao (NSF)
  • Workshop and Tutorial on “Vortex: OpenCL Compatible RISC-V GPGPU” by Hyesoon Kim (Georgia Tech), Blaise Tine (UCLA Asst Prof, GT PhD alum), Jeff Young (Sr Research Scientist GT), GT PhD students: Jaewon Lee, Seonjin Na, Liam Cooper, Chihyo (Mark) Ahn
  • Tutorial on “ASTRA-sim and Chakra: Enabling Software-Hardware Co-Design Exploration for Distributed Machine Learning Platforms” by Tushar Krishna, William Won (GT PhD student), Joongun Park (GT Postdoc), Taekyung Heo (NVIDIA, GT Postdoc alum) and Vinay Ramakrishnaiah (AMD)

For more information about MICRO, click here.