Official Job Title
Assistant Professor
Email Address
Biography

Divya is an Assistant Professor in School of ECE and Computer Science. Divya received her Ph.D. from Georgia Institute of Technology and Master’s from UT Austin. She obtained her Bachelor’s from IIT Ropar where she was conferred the Presidents of India Gold Medal, the highest academic honor in IITs.

Prior to joining Georgia Tech, Divya was a Senior Researcher at Microsoft Azure since September 2019. Her research has been published in top-tier venues such as ISCA, HPCA, MICRO, ASPLOS, NeurIPS, and VLDB. Her dissertation has been recognized with the NCWIT Collegiate Award 2017 and distinguished paper award at High Performance Computer Architecture (HPCA), 2016.

Currently, she leads the Systems Infrastructure and Architecture Research Lab at Georgia Tech. Her research team is devising next-generation sustainable compute platforms targeting end-to-end data pipeline for large scale AI and machine learning. The work draws insights from a broad set of disciplines such as, computer architecture, systems, and databases.

Research
  • Computer Architecture
  • Systems for Machine Learning
  • Large Scale Infrastructure for AI and Data Storage
Distinctions & Awards
  • College of Computing Dissertation Award, Georgia Institute of Technology 2020 
  • National Center for Women & Information Technology (NCWIT) Collegiate Award, 2017
  • Distinguished Paper Award, 22nd IEEE Symposium on High Performance Computer Architecture, 2016
  • President of India Gold Medalist, Indian Institute of Technology Ropar, 2012
Publications

Irene Wang, Prashant J. Nair, Divya Mahajan. FLuID: Mitigating Stragglers in Federated Learning using Invariant Dropout. Neural Information Processing Systems (NeurIPs). Neural Information Processing Systems

Adnan M, Maboud Y, Mahajan D, Nair P. Accelerating recommendation system training by leveraging popular choices. Proceedings of the VLDB Endowment. 2022 January 14

TarnawskiJ.,PhanishayeeA.,DevanurN.,MahajanD.,ParavecinoF.N..Efficientalgorithms for device placement of DNN graph operators. Advances in Neural Information Processing Systems. Advances in Neural Information Processing Systems

Mahajan D, Kim J, Sacks J, Ardalan A, Kumar A, Esmaeilzadeh H. In-RDBMS hardware acceleration of advanced analytics. Proceedings of the VLDB Endowment. 2018

Mahajan D, Park J, Amaro E, Sharma H, Yazdanbakhsh A, Kim J, Esmaeilzadeh H. TABLA: A unified template-based framework for accelerating statistical machine learning. 2016 IEEE International Symposium on High Performance Computer Architecture (HPCA). 2016