Digital MOS Integrated Circuits
CMPE Degree: This course is Not Applicable for the CMPE degree.
EE Degree: This course is Not Applicable for the EE degree.
Lab Hours: 0 supervised lab hours and 0 unsupervised lab hours.
Technical Interest Group(s) / Course Type(s): Electronic Design and Applications
Catalog DescriptionDetailed analysis of the operaration and design of high performance MOS
digital integrated circuits. Emphasis is on current design techniques
with examples from the literature.
Textbook(s)CMOS Logic Circuit Design
Student OutcomesIn the parentheses for each Student Outcome:
"P" for primary indicates the outcome is a major focus of the entire course.
“M” for moderate indicates the outcome is the focus of at least one component of the course, but not majority of course material.
“LN” for “little to none” indicates that the course does not contribute significantly to this outcome.
1. ( Not Applicable ) An ability to identify, formulate, and solve complex engineering problems by applying principles of engineering, science, and mathematics
2. ( Not Applicable ) An ability to apply engineering design to produce solutions that meet specified needs with consideration of public health, safety, and welfare, as well as global, cultural, social, environmental, and economic factors
3. ( Not Applicable ) An ability to communicate effectively with a range of audiences
4. ( Not Applicable ) An ability to recognize ethical and professional responsibilities in engineering situations and make informed judgments, which must consider the impact of engineering solutions in global, economic, environmental, and societal contexts
5. ( Not Applicable ) An ability to function effectively on a team whose members together provide leadership, create a collaborative and inclusive environment, establish goals, plan tasks, and meet objectives
6. ( Not Applicable ) An ability to develop and conduct appropriate experimentation, analyze and interpret data, and use engineering judgment to draw conclusions
7. ( Not Applicable ) An ability to acquire and apply new knowledge as needed, using appropriate learning strategies.
Strategic Performance Indicators (SPIs)
Physics of the MOS system
MOSFET I-V equations
Layout and parasitics
Static Logic Gates
CMOS inverter: DC and transient analysis
Pass transistor networks
Complex logic gates
Pseudo nMOS networks and arrays
SRAM cells and arrays
Driver chain sizing
Transmission Gate Networks
CMOS TG analysis
Dynamic Logic Families
Clocks and synchronization
Precharge/evaluate ripple logic
Domino logic families
Basic DL analysis and modified P/E chains
NORA and related families
Advanced single and dual phase techniques
Clock distribution techniques
Applications to current high-performance systems design
Differential Logic Families
DSL and related families
Current design strategies