Interconnection Networks for High-Performance Systems


CMPE Degree: This course is Not Applicable for the CMPE degree.

EE Degree: This course is Not Applicable for the EE degree.

Lab Hours: 0 supervised lab hours and 0 unsupervised lab hours.

Technical Interest Group(s) / Course Type(s): Computer Systems and Software

Course Coordinator: Tushar Krishna

Prerequisites: ECE 6100 or CS 6290

Corequisites: None.

Catalog Description

Architecture, design methodology, and trade-offs of interconnection networks at various scales - on-chip (for multicore CPUs and accelerators) and off-chip (for HPC and datacenters)


On-Chip Networks

Course Outcomes

Not Applicable

Student Outcomes

In the parentheses for each Student Outcome:
"P" for primary indicates the outcome is a major focus of the entire course.
“M” for moderate indicates the outcome is the focus of at least one component of the course, but not majority of course material.
“LN” for “little to none” indicates that the course does not contribute significantly to this outcome.

1. ( Not Applicable ) An ability to identify, formulate, and solve complex engineering problems by applying principles of engineering, science, and mathematics

2. ( Not Applicable ) An ability to apply engineering design to produce solutions that meet specified needs with consideration of public health, safety, and welfare, as well as global, cultural, social, environmental, and economic factors

3. ( Not Applicable ) An ability to communicate effectively with a range of audiences

4. ( Not Applicable ) An ability to recognize ethical and professional responsibilities in engineering situations and make informed judgments, which must consider the impact of engineering solutions in global, economic, environmental, and societal contexts

5. ( Not Applicable ) An ability to function effectively on a team whose members together provide leadership, create a collaborative and inclusive environment, establish goals, plan tasks, and meet objectives

6. ( Not Applicable ) An ability to develop and conduct appropriate experimentation, analyze and interpret data, and use engineering judgment to draw conclusions

7. ( Not Applicable ) An ability to acquire and apply new knowledge as needed, using appropriate learning strategies.

Strategic Performance Indicators (SPIs)

Outcome 1 (Students will demonstrate expertise in a subfield of study chosen from the fields of electrical engineering or computer engineering):
1. Explain the role of interconnection networks in modern computer systems at various scales (on-chip to datacenter)
2. Describe the trade-offs for application-specific and general-purpose network architectures

Outcome 2 (Students will demonstrate the ability to identify and formulate advanced problems and apply knowledge of mathematics and science to solve those problems):
1. Apply quantitative metrics to analyze and contrast various network topologies, routing algorithms, flow-control schemes and switch microarchitectures

Outcome 3 (Students will demonstrate the ability to utilize current knowledge, technology, or techniques within their chosen subfield):
1. Develop and contrast different network topologies based on the bandwidth provided by the link technology
2. Create deadlock-free routing algorithms

Course Objectives

Topical Outline

1. Introduction to Interconnection Networks
a. Introduction
b. Types of Networks
c. Evaluation Metrics
2. Topology
a. Metrics for comparing topologies
b. Direct Topologies
c. Indirect Topologies
d. Hierarchical Topologies
3. Routing
a. Deterministic Routing
b. Oblivious Routing
c. Adaptive Routing
4. Flow-Control
a. Message-based Flow Control
b. Packet-based Flow Control
c. Flit-based Flow Control
d. Virtual Channels
5. Deadlocks
a. Channel Dependency Graph
b. Turn Model
c. Up*/Down* Routing
d. Escape Virtual Channels
e. Deadlock Recovery
6. Microarchitecture
a. Router Organization
b. Pipeline
c. Optimizations
d. Buffer Management
e. Crossbar Design
f. Allocators and Arbiters
7. System Interface
a. Shared Memory Multiprocessors
i. Cache Coherence
ii. Deadlocks
b. Message Passing
8. Implementation: RTL and Circuits
a. Wire Delay
b. Router Pipelines
c. Power Consumption
d. Area Overheads
9. Advanced Topics
a. Physical and Virtual Express Topologies
b. Single-cycle Multi-hop Networks
c. Multicast Communication
d. Silicon Photonics
e. Reliability and Faults
f. GPU Networks
g. FPGA Networks
10. System-level Networks
a. Supercomputer Networks
b. Datacenter Networks
11. Case Studies with Real Chips
a. Supercomputers
i. D E Shaw Research Anton 2
ii. IBM BlueGene Q
b. Multicore
i. Intel SCC
ii. ST Spidergon
iii. Tilera TILE64
iv. UT Austin TRIPS
v. University of Michigan Swizzle Switch
c. Accelerators
i. IBM TrueNorth
ii. Google TPU
12. Emerging Trends
a. Heterogeneous Systems
b. Spatial Accelerators (Deep Learning, Graph Processing)
c. Internet-of-Things and Edge-Computing