Tushar Krishna is an Associate Professor in the School of Electrical & Computer Engineering at Georgia Tech, with an adjunct appointment in Computer Science. He held the ON Semiconductor (Endowed) Junior Professorship in ECE from 2019–2021, and has been a visiting professor at MIT EECS + CSAIL and Harvard CS, and a researcher in Intel's VSSAD group. He earned his Ph.D. in EECS from MIT (2014), an M.S.E. from Princeton (2009), and a B.Tech. from IIT Delhi (2007).
Krishna's research spans computer architecture, interconnection networks, networks-on-chip, and AI/ML accelerator systems — with a focus on optimizing data movement in modern computing platforms. His research has been funded by awards from NSF, DARPA, IARPA, SRC (JUMP 2.0), the Department of Energy, Intel, Google, Meta, Qualcomm and TSMC. His papers have been cited over 24,000 times, and he is a member of the Halls of Fame of all three premier computer architecture conferences — MICRO, HPCA, and ISCA.
Krishna was a recipient of the “Under 40 Innovators Award” at DAC in 2025 and won the 2026 ACM SIGARCH Maurice Wilkes Award. At Georgia Tech, he has been honored by the “Class of 1940 Course Survey Teaching Effectiveness Award” in 2018, the “Roger P. Webb Outstanding Junior Faculty Award” from the School of ECE in 2021, the “Richard M. Bass/Eta Kappa Nu Outstanding Junior Teacher Award” in 2023, and the “Roger P. Webb Outstanding Mid-career Faculty Award” from the School of ECE in 2024.
Krishna serves as Co-Director of the Center for Research into Novel Computing Hierarchies (CRNCH) at Georgia Tech and co-chairs the Chakra Execution Traces & Benchmarks working group within MLCommons.
- Ph.D., Electrical Engineering and Computer Science, Massachusetts Institute of Technology, 2014
- M.S.E., Electrical Engineering, Princeton University, 2009
- B.Tech., Electrical Engineering, IIT Delhi, 2007
Dr. Krishna’s research spans computer architecture, interconnection networks, networks‑on‑chip (NoC), and AI/ML accelerator systems – with a focus on optimizing data movement in modern computing platforms. His work explores novel architectures, heterogeneous computing, memory systems, and scalability challenges. He investigates computational models that optimize speed, power, and resource utilization, addressing key bottlenecks in modern computing platforms to advance both hardware and system‑level innovations.
Professor Krishna's teaching interests include undergraduate and graduate courses in computer architecture, digital systems design, and hardware‑software interface topics. He emphasizes foundational concepts in microarchitecture, parallel processing, and systems design. His instruction aims to equip students with analytical and practical skills essential for advancing in computing systems and emerging technologies, fostering both theoretical understanding and hands‑on experience.
- HPCA Hall of Fame Award, 2022
- Qualcomm Faculty Award, 2021
- Roger P. Webb Award for Outstanding Junior Faculty Member by School of ECE, Georgia Tech, 2021
- Best Paper Award at 28th IFIP/IEEE Int. Conference on Very Large Scale Integration (VLSI-SoC), 2020
- Facebook Faculty Research Award, 2020
- Best Paper Award at 26th IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2020
- IEEE Micro’s Top Picks for Computer Architecture, 2020
- Facebook Faculty Research Award, 2019
- Google Faculty Research Award, 2019
- IEEE Micro’s Top Picks from Computer Architecture, 2019
- Honorable Mention in IEEE Micro Top Picks from Computer Architecture, 2019
- Class of 1940 Course Survey Teaching Effectiveness Award, 2018
- NSF CISE Research Initiation Initiative (CRII) Award, 2018
- Best Paper Award (Design Methods & Tools Track) at Design Automation and Test in Europe (DATE), 2017
- Best Paper Award at the 8th International Symposium on Networks-on-Chip (NOCS), 2014
- IEEE Micro Top Picks from Computer Architecture, 2014
- IEEE Micro Top Picks from Hot Interconnects Symposium, 2009
- Princeton Graduate Fellowship, 2007-08
- ICIM Stay Ahead Award for the Best Undergraduate Project in Computer Technology, IIT Delhi, 2007
- Z Wan, CK Liu, J Qian, H Yang, A Raychowdhury, T Krishna, “Reason: Accelerating probabilistic logical reasoning for scalable neuro‑symbolic intelligence,” arXiv:2601.20784, 2026.
- Z Wan, H Yang, J Qian, R Raj, J Park, C Wang, A Raychowdhury, ..., “Compositional AI Beyond LLMs,” ACM International Conference on Architectural Support, 2026.
- R Raj, H Wang, T Krishna, “A CPU‑Centric Perspective on Agentic AI,” arXiv:2511.00739, 2025.
- Z Du, H Kang, S Han, T Krishna, L Zhu, “OckBench: Measuring the Efficiency of LLM Reasoning,” arXiv:2511.05722, 2025.
- C Man, J Park, H Wu, H Xu, S Sridharan, T Krishna, “STAGE: A Symbolic Tensor grAph GEnerator,” arXiv:2511.10480, 2025.