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2021 TNANO Best Paper Award Goes to ECE Researchers Led by Shimeng Yu

Atlanta, GA
Shimeng Yu, Yuan-chun Luo, Jae Hur

Ph.D. candidate Yuan-chun Luo, ECE associate professor Shimeng Yu, and postdoctoral researcher Jae Hur. 

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A team of Georgia Tech researchers led by Shimeng Yu, associate professor in the School of Electrical and Computer Engineering, has won the 2021 IEEE Transactions on Nanotechnology (T-NANO) Best Paper Award. Co-authors of the award-winning paper are Ph.D. candidate Yuan-chun Luo and postdoctoral researcher Jae Hur.

Each year, T-NANO selects a paper that appeared in the Transactions publication during the previous calendar year for its Best Paper Award. Candidate papers are nominated by members of the editorial board. Evaluation is done by members of the senior editors panel, with criteria including technical merit, originality, potential impact on the field, clarity of presentation, and practical significance for applications.

The Georgia Tech team’s paper, "Ferroelectric Tunnel Junction Based Crossbar Array Design for Neuro-Inspired Computing," appeared in volume 20, pp. 243-247 of the publication. It details a promising candidate for the implementation of low-power and area-efficient neuro-inspired computing called a ferroelectric tunnel junction (FTJ) based crossbar array. Past research has shown that the on-state current density is too low to realize a FTJ crossbar array for neuro-inspired computing. To overcome this problem, the team has proposed a stacked FTJ to increase the effective area so that desirable current level can be achieved. A HSPICE simulation with projected 1 nm thick FTJ based on the concept of stacked DRAM capacitor at 20 nm node was ran, and to make the distribution of on-state and off-state devices realistic within the array quantized weights of VGG-8 to the FTJ crossbar array were mapped. The evaluation of summed current, accuracy, and delay suggests that FTJ crossbar array should be a promising candidate for neuro-inspired computing.

The 2021 TNANO Best Paper Award is the latest research from Yu’s Laboratory for Emerging Devices and Circuits to receive high recognition. This year, five papers were accepted by the IEEE Symposium on VLSI Technology and Circuits, one of the premier conferences in the microelectronics. Additionally, Yu was recognized with ECE’s 2022 Outstanding Mid-Career Faculty Award for his research in machine learning hardware design leveraging in-memory computing, as well his strong teaching record.

Last revised August 25, 2022